1. Field of Invention
The invention relates generally to frequency modulation of an RF carrier and more particularly to frequency modulation of a synthesized carrier generated by a phase-locked loop.
2. Description of Prior Art
It is well known in the art to synthesize frequencies by means of phase-locked loop circuits. The phase-locked loop (PLL) includes a tunable oscillator (typically a voltage-controlled oscillator (VCO)) whose output is locked to a known reference signal by means of a phase comparator. The phase comparator generates an output voltage or current that is proportional to the phase difference between the two signals. The phase comparator output is fed back to the input of the VCO and used to tune the VCO. This forces the VCO output to have exactly the same frequency as the reference signal. By interposing a divide-by-N block in the circuit the reference frequency may instead be compared with the VCO frequency divided by N; the VCO output will then be locked to N times the reference frequency. By varying N, it is possible to generate frequencies which are the Nth harmonics of the reference frequency, where N is an integer. Another technique, Fractional N, makes it possible to generate frequencies that are any rational multiple of the reference frequency. Such a technique is disclosed in U.S. Pat. No. 3,928,813 issued to Charles A. Kingsford-Smith on Dec. 23, 1975, entitled, "Device for Synthesizing Frequencies which are Rational Multiples of a Fundamental Frequency."
In a given application, it is often desired to frequency modulate (FM) the synthesized signal. A PLL is in effect a control system that maintains a constant phase difference between two signals. Any variations in the phase of one signal relative to the other are removed by the PLL. This property of a PLL is utilized to suppress noise and clean up a signal, however, this property also tends to suppress any frequency modulation, of the PLL output.
Audio FM may be accomplished by splitting the FM signal into two separate signal paths. One path is AC coupled to the VCO and will be the primary path for the FM signal for frequencies that are above the bandwidth of the PLL. FM at frequencies inside the PLL bandwidth is integrated and then injected into a summing node at the output of the phase detector. Since phase is the integral of frequency, FM at frequencies within the PLL bandwidth is accomplished by phase modulation (PM). Properly scaling the gains of each signal path provides flat FM response both inside and outside the PLL bandwidth. The above technique is often employed to accomplish FM in PLLs, however, it has some important limitations.
There are two characteristics which place inherent limits on the amount of frequency deviation from the center frequency that is obtainable in a PLL. First, phase detectors typically operate linearly only over a range of a few degrees or a small fraction of a radian. This forces the maximum allowed frequency deviation to be small at low modulation rates. Secondly, an integrator generally comprises an OP-AMP with a capacitor in the feedback path. Practical integrators cannot provide an output that is higher than the power supply voltage, typically .+-.10 to .+-.15 volts. This determines the maximum PM signal, further restricting the maximum FM deviation.
A typical application requires an RF signal to be frequency modulated at audio rates and at relatively high carrier frequency deviations. This application requires a large modulation index, where the modulation index is the ratio of the maximum frequency shift in the output of the VCO to the modulation rate. Usually a large modulation index is obtained by constructing a PLL with a narrow bandwidth thus allowing most of the modulation to be accomplished outside the bandwidth of the loop.
The limitation of a narrow bandwidth loop is that the stability provided by a wide bandwidth PLL is lost. Narrow bandwidth loops are also inherently noisier and more susceptible to spurs and jitter caused by external sources such as vibration than are wide bandwith loops. The ideal system for FM in a PLL would comprise a wide bandwidth loop with both a phase detector and an integrator that have infinite range.